G2995 G2996 台湾致新代理商 GMT LDO系列 DDR终结器

DDR Termination Regulator

Part Number	VDDQ (V)min.	VDDQ (V) max.	Isource(A)	Isink(V)	LVREF(mA)	VCNTL (V)	EN	Note	Package
G2995/6	1.6	5.5	1.5	1.5	0.03	1.8~5.5	NO	DDR1/2	SOP-8(FD)

 

General Description
The  G2995  is  a  linear  regulator  designed  to  meet  the  JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic)  specifications  for  termination  of  DDR-SDRAM.  It contains a high-speed operational amplifier that pro-vides  excellent  response  to  the  load  transients.  This  device  can  deliver  1.5A  continuous  current  and  tran-sient peaks up to 3A in the application as required for DDR-SDRAM termination. With an independent VSENSEpin,  the  G2995  can  provide  superior  load  regulation.  The G2995 provides a VREF output as the reference for the applications of the chipset and DIMMs.

The  G2995  can  easily  provide  the  accurate  VTT  and  VREF  voltages  without  external  resistors  that  PCB  ar-eas  can  be  reduced.  The  quiescent  current  is  as  low  as  280μA  @  2.5V.  So  the  power  consumption  can  meet the low power consumption applications.

Features
„Operation Supply Voltage: 1.6V to 5.5V „
Low Supply Current: 280μA @ 2.5V
„Low Output Offset „
Source and Sink Current „Low External Component Count „
No Inductor Required
„No external Resistors Required
„Thermal Shutdown Protection„
SOP-8 with Power-Pad package

Applications „
DDR-SDRAM Termination Voltage „
DDR-I / DDR-II Termination Voltage „
SSTL-2 „
SSTL-3

Ordering Information

ORDER NUMBER (Pb free/Green)	MARKING	TEMP. RANGE	PACKAGE
G2995P1Uf	G2995	40°C~ +85°C	SOP-8
G2995F1Uf	G2995	40°C~ +85°C	SOP-8-(FD)

Note:  P1:SOP-8                
F1:SOP-8(FD)  U: Tape & Reel        
(FD): Thermal Pad

Pin Configuration                                             Typical Application Circuit

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