产品
W9412G6JB
The W9412G6JB is a 128M DDR SDRAM and speed involving -4/-5/-5I
| Density | 128Mb | Status | Mass Production |
| Vcc | 2.5V±0.2V 2.4V~2.7V |
Frequency | 200MHz 250MHz |
| Package | TFBGA 60 | Tempture Range | C-temp, I-temp, Automotive |
| Feature List | 2.5V ±0.2V Power Supply for DDR400 2.4V~2.7V Power Supply for DDR500 Up to 250 MHz Clock Frequency Double Data Rate architecture; two data transfers per clock cycle Differential clock inputs (CLK and /CLK) DQS is edge-aligned with data for Read; center-aligned with data for Write CAS Latency: 2, 2.5, 3 and 4 Burst Length: 2, 4 and 8 Auto Refresh and Self Refresh Precharged Power Down and Active Power Down Write Data Mask Write Latency = 1 15.6μS refresh interval (4K/64 mS Refresh) Maximum burst refresh cycle: 8 Interface: SSTL_2 |
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华邦flash，2016年开始主营华邦存储芯片，还有更多flash分享《W25Q128JVSIQ》《W25Q256JVEIQ》。
